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  1. Confluence Data Center
  2. CONFSERVER-28735

Add Verilog and VHDL support to the Code Block macro

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      Please add Verilog and VHDL support to the Code Block macro.

      Requested by a customer via a comment on a doc page:
      https://confluence.atlassian.com/display/DOC/Code+Block+Macro?focusedCommentId=333809761#comment-333809761

      Michael Wrighton

      Would you be willing to add Verilog and VHDL support to the Code Snippet widget? It would be extremely helpful for us (and anybody else who builds hardware) to have syntax highlighting for those languages.

            [CONFSERVER-28735] Add Verilog and VHDL support to the Code Block macro

            Iker Alonso made changes -
            Remote Link New: This issue links to "Page (Atlassian Documentation)" [ 798055 ]
            Sen Geronimo made changes -
            Workflow Original: JAC Suggestion Workflow 4 [ 3577199 ] New: JAC Suggestion Workflow 3 [ 4340545 ]
            Katherine Yabut made changes -
            Workflow Original: JAC Suggestion Workflow 2 [ 3170216 ] New: JAC Suggestion Workflow 4 [ 3577199 ]
            Status Original: RESOLVED [ 5 ] New: Closed [ 6 ]
            Katherine Yabut made changes -
            Workflow Original: JAC Suggestion Workflow [ 3032094 ] New: JAC Suggestion Workflow 2 [ 3170216 ]
            Owen made changes -
            Workflow Original: Confluence Workflow - Public Facing v4 [ 2537139 ] New: JAC Suggestion Workflow [ 3032094 ]
            Rachel Lin (Inactive) made changes -
            Workflow Original: Confluence Workflow - Public Facing v3 [ 2281542 ] New: Confluence Workflow - Public Facing v4 [ 2537139 ]

            Lauretha Rura added a comment -

            As a workaround, users may also install the following brush for Verilog and VHDL syntax highlight on Code Block macro: 

             Retrieved from this Atlassian Community post.

            Lauretha Rura added a comment - As a workaround, users may also install the following brush for Verilog and VHDL syntax highlight on Code Block macro:  Verilog - https://plugins.trac.wordpress.org/export/1702796/syntaxhighlighter-evolved-vhdl-brush/trunk/shBrushVerilog.js VHDL - https://plugins.trac.wordpress.org/export/1702797/syntaxhighlighter-evolved-vhdl-brush/trunk/shBrushVhdl.js  Retrieved from this Atlassian Community post .
            Katherine Yabut made changes -
            Workflow Original: Confluence Workflow - Public Facing v3 - TEMP [ 2170289 ] New: Confluence Workflow - Public Facing v3 [ 2281542 ]
            Katherine Yabut made changes -
            Workflow Original: Confluence Workflow - Public Facing v3 [ 1930813 ] New: Confluence Workflow - Public Facing v3 - TEMP [ 2170289 ]
            Katherine Yabut made changes -
            Workflow Original: Confluence Workflow - Public Facing v2 [ 1748472 ] New: Confluence Workflow - Public Facing v3 [ 1930813 ]

              Unassigned Unassigned
              smaddox SarahA
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                Created:
                Updated:
                Resolved: